I’m trying to simulate a common drain amplifier on LTSpice which can be used to shift the input voltage either up or down by the threshold voltage ($V_{IN}+V_{TH}$ or $V_{IN}-V_{TH}$, depending on PMOS or NMOS configuration). The bulk terminals of PMOS must be connected to the most positive rail while NMOS bulk terminal must be connected to the most negative rail for the transistors to work in the reverse bias hence, allowing control of current flow and $V_{TH}$.
My question is, would it be possible to adjust the threshold voltage by varying the connection of the bulk terminals? Or is this a bad practice?